NVIDIA · Pascal · 2016
P100 GPU accelerator (mezzanine)
P100 GPU accelerator (mezzanine): 16 GB HBM2, 300 W, 3,584 CUDA cores. Launched April 5, 2016.
- Memory
- 16 GB
- Power
- 300 W
- Bus width
- 4,096 bit
Memory16 GB
13 of 32 in Data Center
Power300 W
12 of 40 by higher draw in Data Center
CUDA cores3,584
16 of 47 in Data Center
Current market
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Specifications
Memory
- Capacity
- 16 GB
- Memory type
- HBM2
- Bus width
- 4,096 bit
- Bandwidth
- 732 GB/s
Compute
- CUDA cores
- 3,584
- SM count
- 56
- TMUs
- 224
- ROPs
- 96
Clocks
- Base clock
- 1,328 MHz
- Boost clock
- 1,480 MHz
Board
- TDP
- 300 W
- Form factor
- datacenter
Physical
- Architecture
- Pascal
- Series
- Data Center
- Launch date
- April 5, 2016
Not recorded by the source: generation, codename, process and transistors, or 9 further fields.
Die figure
Silicon, made visible
Die area is drawn against the largest recorded die in the catalog. Shader dots use a labeled, card-specific ratio so both early and modern GPUs remain legible.
Catalog context
Within its series, the P100 GPU accelerator (mezzanine) ranks 13th of 32 for memory capacity. Its 300 W TDP is above the 75 W PCIe slot-power ceiling.
Source: Wikipedia, revision 1369488585 · catalog loaded 2026-08-16