NVIDIA · Fermi · 2011
C2050 GPU Computing Module
C2050 GPU Computing Module: 3 GB GDDR5, 247 W, 448 CUDA cores. Launched July 25, 2011.
- Memory
- 3 GB
- Power
- 247 W
- Bus width
- 384 bit
Memory3 GB
30 of 32 in Data Center
Power247 W
23 of 40 by higher draw in Data Center
CUDA cores448
35 of 47 in Data Center
Current market
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Specifications
Memory
- Capacity
- 3 GB
- Memory type
- GDDR5
- Bus width
- 384 bit
- Bandwidth
- 144 GB/s
Compute
- CUDA cores
- 448
- SM count
- 14
- TMUs
- 56
- ROPs
- 48
- FP32
- 1,030 GFLOPS
- FP64
- 515.2 GFLOPS
Clocks
- Base clock
- 1,150 MHz
Board
- TDP
- 247 W
- Form factor
- datacenter
Physical
- Architecture
- Fermi
- Series
- Data Center
- Launch date
- July 25, 2011
Not recorded by the source: generation, codename, process and transistors, or 8 further fields.
Die figure
Silicon, made visible
Die area is drawn against the largest recorded die in the catalog. Shader dots use a labeled, card-specific ratio so both early and modern GPUs remain legible.
Catalog context
Within its series, the C2050 GPU Computing Module ranks 30th of 36 for FP32 throughput and 30th of 32 for memory capacity. Its 247 W TDP is above the 75 W PCIe slot-power ceiling.
Source: Wikipedia, revision 1369488585 · catalog loaded 2026-08-16